Spot sequential character generator



March 29, 1960 w. E. TRu-:sr

sPoT sEQuENTIAL CHARACTER GENERATOR 13 Sheets-Sheet 1 Filed June 16.1954 INVENTOR.

`WILLIAM E.TRIEST AGENT Btw-u March 29, 1960 w. E. 'rRlEsT sPoTSEQUENTIAL CHARACTER GENERATOR 13 Sheets-Sheet 2 Filed June 16, 1954AGENT March 2.9, 1960 Filed June 16,l 1954 W. E. TRIEST SPOT SEQUENTIALCHARACTER GENERATOR 13 Sheets-Sheet 3 Illlllllllllllllllllu INVENTOR.wlLuAM E Tmssr AGENT March 29, 1960 w. E. TRIEST 2,931,022

SPOT SEQUENTIAL CHARACTER GENERATOR 13 sheets-sheet 4 Filed June 16.1954 INVENTOR. WILLIAM E. TRIEST AGENT March 29, 1960 w. E. 'rRlEsT2,931,022

SPOT SEQUENTIAL CHARACTER GENERATOR Filed June 1e, 1954 `13,sheets-snee*v s @,101 /soa $103 $120 f BIAS 1 1 W16 DRIVER INVENTOR.

WILLIAM E.TREST Maf/5J.

AGENT March 29, 1960 w. E. 'rRlEsr spor SEQUENTIAL CHARACTER GENERATOR15l Sheets-Sheet 6 Filed June' 16. 1954 C 5 m F REGULATED VOLTAGE SOURCEINVENTOR.

WILLIAM E. TRIEST AGENT March 29, 1960 w. E; TRlEsT A 2,931,022

, SPOT SEQUENTIAL CHARACTER GENERATOR Filed June 16. 1954 15Sheets-Sheet 7 AGENT -March 29, 1960 w. E. rRlEs'r l 2,931,022

SPOT SEQUENTIAL CHARACTER GENERATOR l" INVENTOR.

n yWILLIAM E. TRIEsT a to. L BY mam AGENT 13 Sheets-Sheet 9 INVENTOR.

WILLIAM E. TRIEST am AGENT ,motuzuu mwN W. E. TRIEST SPOT SEQUENTIALCHARACTER GENERATOR Ohm mmh 29, 1960 Filed June 16, 1954 NhN March 29,1960 w. E. rRll-:ssT

sPou` sEQuEN'rIAL CHARACTER GENERATOR 13 Sheets-Sheet 10 Filed June 16.1954 Plana INVENTOR. WILLIAM E. TRIEST March 29, 1960 w. E. TRIEsT2,931,022

sPo'r SEQUENTIAL CHARACTER GENERATOR Filed June 16. 1954 13 Sheets-Sheet11 VOLTAGE Y INVENTOR. WlLLlAM E TRIEST AGENT Mardi 29, 1969 w, E,TR|EsT 2,931,022

SPOT SEQUENTIAL CHARACTER GENERATOR Filed June 16, 1954 13 Sheets-Sheet12 F|G.|3 1 [52o l 91 511 y, 507, l 50e) l /509 /5o FF FF FF FF FF 85193 goej f`511s 1 A f L O ''gL--l lfsol ./5l5 I/504 l/505 M s1' ery er GTGT n $502 Q fsos Q f Q f BUFFER BUFFER AMP AMP ses f f OUTPUT E: sescLEAR ses ist JNVENToR. L59? wlLLlAM E. 'rRlEsT GOMPLEMENT BY mda/Q4AGENT The present invention"relatestoan improved apparatus and systemrfor fcharacter synthesis and moreparticunational Business `Mac`hi`n`esCorporaticnghlew York,

larly to an improvedy highi speed electroniciapparatus. and

system i for character f synthesis tof f the cathode t ray'iV type. l#While the development ofihighspeedelectronic com puters has resulted insteady advances in operating `speed and storage'capacitytoa relativelyhigh degree of refinement, one-of theifact'ors :limitin'githeoverallspeedof operation of computers is the output printer or displaysystem where the results of" af calculation maybe` recorded ordisplayed. @1.9i f; Much ingenuity and i, considerable research have1resulted in thedevelopmentLofwtmechanical` andelectromechanical"printing deviceslof the prior art toarelatively high degree ofrefinement@` with respectto printing speed, efficiency andwreliability.*":Thei operating. speed Yof these evices, `howeverfisalways@limiteduby` the,` inherent mechanical inertia ofthe'componenttmovingparts,1andby available powerh The ihighestspeedsformechanical and electromechanical printers haveibeen achieved byparalleloperation,V i.e`.,"infisuchemannenl thatl `an ,entire line: ofcharacters is l lprintedi n simultaneously.. Such ffoperation,

however, always entails storage of the entire lineof information :tobeiprinted, :resulting in additional equipment and increased complexitytbein'glintroduced Lintorthe system-Serial operation,iwhilefnot,requiring/such storage and not subject to the resultantflimtationsgimposed thereby, `,dictates a'ifarulowerimaximumprintingspeed.;jIhus Ythe need-.forla printinggme'ans capable ofygreaterspeedthanithe fastest mechanicalLi-system, butwith serial Aoperation, ismanifest. ..ifSuchaadevicefmayfbe employed, for examplefnot onlyt-for;recording l0utput;,.data, ,fromm-an Aelectronic computenfbut'ialsofor-accepting and recording `informationffromifa;magneticltapeordrurngor other type `storage medium.y: a :.-1 if ,g l v Electronicmethodsy of; charactergsynthesis Eare /practically` freev of inertiaanditherefore inherently capable ,of

Accordingly-gone of thefobjectsofthe presentginvenftion is to 1 ,providean improyed .1 apparatus ffOr character synthesis `wherein thecharactergis generated for display :as a-successionbfispots onlthescreenjpf a 'cathode ray tube atahigh ratetofrspced. n f

`serial ytype; 'operation at `yeryfhigh speed.,,The present inventioniisi thereforedirectedy towardan improved apparatusV and l method wherebycharacter synthesis maybe aci complished in [a serial; t type,operation`by,` means f of, a cathode rayrtube;,(CRliluand-,associated circuitry.l

Stillwanotheriobject,oftthegpresentpinvention is tojpr'oy `vider animprovedapparatustflor character synthesisE which converts asuccessiomof .coded binary iinput signals to .a succession of ,pairs 1of,- CRT 'ideiiecton yvoltagesl in pr'edetermined `timeseque1 '1,ce,eachVof the pairs of detiection voltages, being a` function offtheaddresswhich. deines y -Sti11 .another object of the present invention is topro,- vide an improved apparatus for character synthesis whereinthenumbentype, `or size.' of the symbolsitocbe.fdisf played" may `be variedwith only "relatively minorcircuit modifications.Vv v f .z .t3 Anotherand still further objectrof the 4present invention is to provide animprovedmethodgof character vsynthesis comprising the stepsof decodingafcommand signal to select a character to be synthesized, generating avsuccessionof coded signals. representingV the selected character,decoding the signals-tota deflection signal varying 'asiaifunction of acodedraddress and controlling thedeection of a. CRT. by said rdecoded;potentials as a; suc.- cession ofspots.Y u j I f v l i- `Sti1l.anotherobject of the present inventionisto-provide `anY improved 'method for igenerating a i plurality vlof characters'on the screen Iof atcathoderaytube comprising the :steps of 'successively decoding`encoding1anddecoding to obtain'a firstand second `series of deliecton potentalsvaryingva's a pairfofcoded addresses and controlling thei beam=deectinglmeansof a cathode raytube by said deflection potentials tothereby synthesize a character as a succession of spots. t Y i i, t t

Affurther object ofthe presentinvention-isfto provide -a'n improvedapparatus'for `character synthesis whereinv a coding network having apluralityiof stages together,with means to actuatelhe successive stagesofjthe `networltis providedfto successively produce signals which-whendecodedgand applied to'` the delection platesof a` cathode ,ray tubecause the beam of the cathode ray 'tube toghe successively deflectedfrom spot to` spot/in synchronism with the decoded signals to4 therebysynthesize a character.

Another object ofthe present invention is to `provide an improvedapparatusfor character synthesisgwherein -avcoding networkk having aplurality of independent cod- 'ing -cir'cuits1each representing anassociated character,

together with means to selectively actuate a, series `of coding circuitslrepresenting the selectedzcharacters is provided to cause each of thecoding circuits tosuccessively produce a seriesy of signalsv which whendecodedandappliedtovthe deflection plates causethe beam Vofajcathode raytube to lbe successively deflected fromspot to ,spot in Vsynchronismwith the 'decoded ,signals for each Vcharacter ,to 4thereby synthesize.a plurality of characters in-a prevdeterrriined sequence. y y l v`.l-rvfurther object Aof the presentinvention is-to provvide an improvedapparatusy for character-synthesis wherein the vcharacter positioning`potentials generatedf by, the

lapparatus control both .the position ofthe characters ,on

the `screen ofr a .cathode ray ,tube and the sequencea .whichthecharacters aregenerateda i, i -Otheriobjects of the inventionhwill bepointed outin the following description and c lairns, andillustratedf'in .the accompanyingJdrawings, lwhich discl ose,ibyway,pf

exafnpleithe` principles 0fv the'iuvelntion and @behest mode Vwhich VhasVbeen contemplated of,v applying that principle. .y y Y Charactergeneration'maybe `accomplished by various systemsv which includecathodey ray'tuhes, forexample:

illustrated in copendingv application N'o.f2463,l`22, :tiledDecember-24, 195.1, now(U.S. Patent 2,754,360. In `this method theintensity pulse coder .consists of a Vcathode fray tube andra photocell;4the cathode ray tube *scans a VVraster behinda mask in which. thecharfactersfhavebeen `cut, out@ Asv the beam passes,aNcut-out'portionofp'the "'m'aslclight passes throughV tothe' phototuhew another cathoderay tube, the print tube, is swept in synchronism with the first cathoderay tube, and its grid is controlled by the pulses from the phototube sothat it displays spots t'o'form aicharacter-shaped pattern. A variationof the `scanned character system kis disclosed in High Speed NumberGenerator Uses Magnetic .Memory VMatrices, Electronics, vol. 26, No. 5,May 1953, pages 200-204. In this system, a television type raster isgenerated by the sweep circuits, using either sawtooth or lstaircasevoltage sweep signals. The CRT beam is unblanked at appropriate times tolgenerate a pattern of spots which defines the character.

In the second system, referred to as the line character system,horizontal and vertical sweep signals and intensity gate signals `aregenerated so that the beam is deected to -trace out the character in amanner similar to the generation of familiar Lissajous patterns. Thenumber of traces required to generate a character varies with thecomplexity of the character. Some of the characters can .be formed by asingle trace, while others require two or more traces to complete. Thebeam is unblanked during the time the beam is tracing a part of thecharacter. An example of this type of system is disclosed in Numeroscopefor Cathode Ray Printing, Electronics, vol 21, No. 6, February 1948,pages 98-102.

The third system as shown in U.S. Patent 2,275,017 issued to McNaney,providesfor all points of the chariacter to be formed simultaneously. vAspecial cathode raytube of the type shown in Patent 2,283,383 alsoissued 'to McNaney, is employed. The cathode ray tube contains a matrixor mask having characters perforated therein interposed between the beamemitting system and a fluorescent screen. The CRT beam is deflected by Xand Y deliection voltage to a particular portion of the matrixcontaining perforations in the form of the desired character, so thatthe beam emerging from the matrix to energize the fluorescent screen isin the shape of the selected character. The tube employed isspecifically designed for a particular number, type and style ofcharacter.

While the above systems whereby character synthesis lmay be accomplishedby means of cathode ray tubes are well-known in the prior art, inaccordance with the principles of the present invention, there isdisclosed an improved apparatus and method for synthesizing a char--acter asa succession of spots on the screen o'f a cathode ray tube. Theapparatus includes a plurality of coding circuits, each circuitrepresenting an associated character, together with means to selectivelyactuate a single circuit orgroup of circuits to successively produce aseries of coded signals for each selected character. These signals,kwhen decoded and applied to the deflection plates of a CRT, cause thebeam of the CRT to be successively defiected from spot-to-spot in apredetermined sequence to thereby synthesize a character or group ofcharacters lfor display'on the screen of the cathode ray tube at a highrate of speed. With respect to the-ensuing description, the termssynthesize and generate, are used inter- Vchangeably with respect to theapparatus herein described.

In the drawings:

Figs. 1a and 1b are an overall block schematic diagram of aspotsequential character generator constructed in accordance with theprinciples of this invention.

Fig. 2 illustrates a synthesized character of selected 'spots on a 7 x 5matrix as it appears on the screen of a CRT, and further serves toillustrate the relationship between the Xand Y 'addresses and the matrixpositions which they define.

Fig. 3 shows a family o'f curves, illustrating the potential waveformsnecessary to 'generate the character 2, the `potentialsoriginating atthe ring driving circuit and proceeding in time sequence through thecoding and "decoding networks to thereby generate the X and Y deflection'potentials proportional tothe coded addresses which define 'thecharacter.

Fig. v4 illustrates in block schematic form one Vembodiment of thecoding network which may be used in the character generator of Fig. 1.

Fig. 5a illustrates in block schematic form another embodiment of thecoding network which may be used in the character generator of Fig. 1.

Fig. 5b is a curve illustrating a preferred hysteresis characteristicfor the Vmaterial of the core yshown in Fig. 5a.

Fig. y5c is a wiring diagram of a bias driver employed in the magneticcore coding network shown in Fig. 5(a).

Fig. 6a illustrates in schematic form still another embodiment of thecoding network which may be used in the character generator of Fig. 1.

Fig. 6b is a curve illustrating a preferred hysteresis characteristicfor the material of the magnetic cores shown in Fig. 6a.

Fig. 7 illustrates in block schematic form a further embodiment of thecoding network which may be used in the character 'generator of Fig. .1.

Fig. 8 illustrates in block .schematicform the ring control andsynchronizing circuit identified as block 57 in Fig. 1.

Fig. 9 illustrates in simplified schematic form the character generatorcontrol circuit, identified as block 66 in Fig. 1.

Fig. 10 is a wiring diagram of the .sequence switch identified as block45 in Fig. 1.

Fig. 11(a) lillustrates in :schematic form the mixing circuit,identified as block 62 in Fig. 1.

Fig. 11(b) illustrates in schematic form the mixing circuit identifiedas 63 in Fig. 1.

Fig. 12 shows a family of curves illustrating the X and Y positioningpotentials produced by the character generator control circuit,identified as 66 in Fig. 1.

Fig. 13 illustrates in block form the ring circuit, identified as block56 in Fig. 1.

Fig. 14 is a detailed wiring diagram of the high-speed flip-hop employedin `the character generator illustrated in Fig. 1.

Fig. 15 is a ldetailed wiring diagram of the gate circuit used in thering circuitof Fig. 1.

Fig. 16 illustrates in simplified schematic form'the .decoder identifiedas block 60 in Fig. 1.

Referring to the drawings and more particularly to Fig. 1 thereof, vaplurality of registers 1-8 lare provided for intermediate storage ofbinary coded character selection signals. Registers 1-8 are connectedthrough their associated gate circuits, shown as .logical AND circuits`9 through 16 respectively, to OR circuit 17, and thence to bufferregister 18. The output from buffer register 18 is applied to characterselection network .19 through conductors 20 through27. The characterselection network 19 operates to select one'of output conductors 28through 43, these output conductors representing 16 characters availablefor synthesis. Sequence switch 45 operates to sample the contents ofregisters 1 through 8 by means of Agate kcircuits 9 through 16 andassociated 'conductors 46 through 53 respectively, to thereby controlread in to character selection network 19 of four binary stages at atime, the output signals of each four stage register representing asingle character. The sampling proceeds successively, so that thecharacter selection signals stored in registers 1-8 are read intocharacter'selection network 19 in sequence, thereby-resulting in thesuccessive energization of conductors 28-43 in the 'order determined bythe contents of the registers 1 through.

Output conductors 28-43 are connected to coding network 55. Codingnetwork 55, together with a ring circuit 56, operates to provide aseries of sequentially related binary signals to the three X and Ysignal lines, shown as X0, X1, X2, Y0, Y1 and Y2, respectively, thesesignals varying in accordance with a predetermined code, the rate ofsequence being determined by the rate ofl operation of the ring circuit.`An end 'of charactersignal,'de

scribed 1 hereinafter, `is also supplied by i-the.. above combinatiomReferring nowy tofFig. ,2.it `will be Vnot-ed that la chars acter, suchas thecharacter 2 can be `represented by,k a succession of spots, `eachspot being d elinedfbyanV X;adl dress and a Yy address. With a maximumofSLX addresses and 7 Y addresses,v 35 possibleaddressablespotsaresavailableinthefxSmatrix.` I., 1 1

Returning now to, Fig. `1,.the. number .of stages inring circuit 56v isdetermined by the siz'e o f the matrix. `reqnired to define theselectedcharacter injaccordance with, the binary CodedgXand. Y'. addressThe Size 0f thtmafrix Y is generallyidetermined byvisualfactorssuchlasgthe size coordinate, each of these coordinates in turn being definedby an associated 3 bit coded address signal.

To .provide the necessary signals under the above conditions, a 20 stagering is employed throughout the ensuingdiscussion for. illustrating an.apparatus employing thelprinf ciples ofthis invention. `However, it isobvious .that the amount of associated equipment'will vary,r"thjough notdirectly, as the size of the matrix selected to` define a character.` Ingeneral, the number of stages in Athe ring and the number" of elementsin thecoding networkwill vary directly as they maximum number ofspotsrrequired to define a character. Y The 2O stage ring circuitdescribedv herein Vis'illustrated in Fig. v13 to be described `ingreater detail hereinafter. The ring circuit basicallyV includesaplurality of gate tubes, each gate tube controlling an aSsociated'ip-op,the combination of a single gate tube and itsassociated tiip-,iiopcomprising eachlstage `ofthe ring vcircui t. The pulse used todrivethering circuitis providedbyring control and synchronizingcircuit57shoyvnV interconnected to ring circuit 56.through `conductor58.

As the descriptionadvances, itfwill be shown :that-the interconnectedgate tubes and dip-flops comprisingring circuit 20 are coupled,vsequentiallytoform a closed ring wherein the flip-opsareirenderedOnsuccessiyely,i.e., fon each voltage pulse applied ,to theringonconductor 58, a flip-dop is VrenderedOn as its rprecedingip-fiop isrendered Ofi. Only oneflip-opuis Ongat anyonetime,

and the Onconditionipropagatesgthrough the successive Y stages of thering, the rate of propagation .being deter mined by the; rate Yofthepulses `.applied on conductor 58. When in the Oncoudition, theoutput-from .the flip-flop is a positivev D.C. level, while in, the 5Olf-'condition-,g the outputfrom the flip-flop `is anegative;D.C. level.Twenty pulses are required toiadvancetthe ring around once.

Codingnetwork 55, operating with'ring circuit'56 in a mannerV to bedescribed in greater 'detaillhe'reinaften provides a series 'ofsequentially related output signals irrthe form of `positive pulses forthe particularfcharacter Selected, thesignals varyinglinamplitudefaccording to a predetermined code; A` 3fbit X and aV 3` bitY binarycoded `address is 'i employed Ito" define each spot lof f the .selectedcharacter" ona 7 X 5"matrix.- l

The coded X address signal output lines X0, Xland X3 :and the codedaddress. signalY output lines Y0, Y1 and Y2 are connected to X andYdecoders'60 and-61m- 'spectivelys `Decoders tland' l'operateto' convertthe `Xand :Y input signals into lXandY'potentials varying in amplitude`as a function off the- X and YV lcodedgaddresses Whichrlefine,r the.ispo'tscom'prising -therselected character. @Outputpotentials.fromrXand-Ydecoders .6.0

Controligrid741of CRT 69 has an unblanking poten-- tial` applied theretowhen flip-dop is inthe On condition. The 4output of. flip-flop 75 isapplied to control grid 74.*ofVV cathoderay tube 69 through conductor76, `intensity: amplifier 77 and conductor 78. Flip-flop 75 is set inthe'On state by the pulse output from gatecircuit 8 0, i Gate circuit $0is conditionedby theD.C. level out? putfrom-flip-op 81 when that ip-iiopis in the Ou condition, and receives a pulse input from ring control andsynchronizing circuit 57 through conductoroSZ and delay circuit 83LFlip-H0975 isset in the Ofi condition by pulsesfrom ring control andsynchronizing circuit 57 on conductorl 82, which in turn is connected toconductor 58,-v to thereby blank the Vbeam of cathode ray tube 69.Flipfop ,81. is. set in the YOn condition by a pulse output from`ringcontrol and synchronizing unit 57 on conductor 84,.,which is inturn connected to conductor 85. The pulse on conductor 85 also initiatesoperation of the ringvcircuit 56. `Flip-flop 81 is set in the Offcondition uponV completion of the synthesisofeach character by a pulsesupplied by the coding network 55 through conductor `86.

As T already noted, sequence switchy 45 operates to sample the contentsofrregisters 1 through 8 byA means of gate circuits 9, through 16,andthissampling proceeds v successively; It is to be further noted thatsequence switch 45 is controlled `by voltages on conductors Xa, Xb, XC,Xd, Y, and Yb, these voltages being produced by charactergeneratorcontrol circuit 66.

Operation in generating a single character t Pulse generator 88 suppliespulses to character generator control circuit 66 when switch 89 is inthe closed position.` Thecharacter generator control circuit thenoperates to produce a start pulse on line 90, which initiatesoperationof the ring control and synchronizing cir cuit 57. Gperation ofthe `ring circuit 56 is initiated bya pulse applied by ring control andsynchronizing circuit 57 to the first stage of the ring circuit 56through con# ductor85.'4 Upon receipt of the start pulse, ring controland `synchronizing circuit 57 also generates a `series of .l microsecondpulses, at `a rate of 500 kc.,twhich are ap# plied through conductor 58Vto drive ring circuit 56 once operation is initiated. As pulses fromconductor 58 are applied to ring circuit 56, the successive stages ofthering are set in the On condition, thereby successively energizing ring`output conductors 10i-12d inclusive. When the last stage'ofthe ringcircuit is set in the On condition, a pulse is applied to charactergenerator conreturned pulsewill initiate Vanother cycle of thering-"circuit 56`provided a stop pulseis not received from char-Aacterrgenerator'control circuit 66. If` a stop pulse is applied toring'control and synchronizing circuit SbyV character generatorcontrol-circuit 66, the ring cannot be recycled as will be shownhereinafter.

r :For purposes of Vthe ensuing description, it is assumed that oneconductorV from character selection network` 19, fory example, conductor28,.has been, selected, thereby resulting in one coding circuit incoding network 55 being energized. lAs ring circuit 56 operates .t9 PPlya pulse desinee" -7 to output conductors 101--120 successively, eachpuls will cause codingtnetwork 55 to produce a set ofcoded outputsignals on conductors X0, X1, X2 and Y0, Y1 and Y2. These coded outputsignalsare decoded by X and -Y decoders 60 Aand 61 respectively toproduce potentials varying as the addresses which define the coordinatesof the spots comprising the selected character. The output signals fromthe X and Y decoders are then applied to mixing circuits 62 and 63respectively, where they are mixed with suitable positioning voltages,to be described in greater detail hereinafter, to thereby produce X andY deflection potentials which are applied to the horizontal and verticaldefiection plates 67 and 68 of cathode ray tube 69 through associateddeflection amplifiers 72 and 73 respectively.

It is well-known in the electrical art that the intensity of theelectron beam Within a cathode ray tube may be controlled by varying thebias voltage applied to its control grid. For the purpose of thisdescription, the electron beam is referred to as being blanked orunblanked. When the electron beam strikes its fluorescent screen so thatvisible light rays are emitted therefrom, the electron beam isarbitrarily referred to as being unblanked. When the electron beam failsto cause visible light rays to be emitted from its fluorescent screen,the electron beam is described as being blanked. The intensificationcircuit operates to blank and unblank the beam in synchronism with the Xand Y coded address signals to thereby detine a character as asuccession of spots in a manner to be described below.

The intensification control circuit of the present apparatus includesflip-liep 75, intensity amplifier 77,` gate circuit S0, fiip-flop Sianddelay circuit 83, and operates in the following manner. The ringstarting pulse, generated by the ring control and synchronizing circuitand applied on conductor 85, is also applied to conductor 84 to therebyturn fiip-fiop 81 to the On condition. Flipflop S1 remains in the Oncondition during the synthesis of a complete character, and is turnedOff by a pulse supplied by coding network 55 on conductor 86. Flipflop81 supplies a D.C. level to condition gate circuit 80. The ring drivingpulses applied by ring control and synchronizing circuit 57 to conductor58 are also applied through conductor 82 to delay circuit v83, wherethey are delayed 1.3 micro-seconds before being applied to gate circuit80. The pulse on conductor 82 also turns flipflop 75 Off. When thedelayed pulse is applied to gate circuit 80, the gate circuit fires andemits a pulse to turn flip-flop 75 On. The pulse output from dip-iop 75is applied to intensity amplifier 77 via conductor 76, which raises theamplitude of the signal applied to control grid 74. of cathode ray tube69 to the desired level for proper intensity. Since the pulses to thering andintensification circuits are applied at two microsecondintervals, the duration of the intensity signal is only .7 microsecondson each spot before flip-flop 75 is turned Off by the .next ring drivingpulse on conductor 82 to thereby blank ,the CRT beam. The abovedescribed operation is repeated for each spot of the selected character,so that upon completion of the ring cycle, the selected character issynthesized as a succession of spots.

The speed of character synthesis employing the apparatus illustrated inFig. 1 is determined, for the most part, by the pulse rate of the ringdriving source in the ring-control and synchronizing circuit, which maybe, fon-example, 500 kc. Under synchronous operation in the mannerdescribed, -40 microsecondsis required for the generation of eachcharacter.- However, .by employing asynchronous operation in a manner tobe described hereinafter with respect to the ring control andsynchronizing circuit, illustrated in Fig. 9, the character generationspeed could be reduced to an average speed of 28 microseconds percharacter with a ring circuit operation of 500 kc. Referring-nowto'Fig.v A2, there'isillustrate'd therein the hractefZmas 'denedibya'su'cees'sion of spots ou a 7 x 5 matrix, the spots, shown as 121-134,-being genevi-atedY in sequence in accordance with a predetermined code.The spots are provided by the CRT beam at each intersection of a pair ofX Vand VY addresses, and are generated in sequential fashion in thedirection indicated by vthe arrows. The character 2 has been selected asillustrative of a typical character, in that it is defined by 14 spots,the average number required to define a character on va 7 x 5 matrix.

As shown, the matrix is composed of five X addresses, each of theaddresses specifying a horizontal level, and seven Y addresses, each ofthe addresses specifying a vertical level, the lines represented by theX and Y addresses together making up a 7 x15 matrix. A maximum of 35possible intersections are available to define a character on a 7 x 5matrix.

Table 1, shown below, lists in binary code the signals to the X and Ydecoder and the corresponding X and Y addresses for the character 2, foreach stage of the ring circuit.

' Signal to Signal to Ring Circuit Stage X X De- Y Y De- Address coderAddress coder XQXIX: YoYlYg 000 000 101 101 001 001 110 011 010 011 110O00 011 001 110 000 111 101 011 011 111 100 001 010 001 011 111 001 011O10 001 000 001 001 011 000 000 000 001 001 O01 000 000 01.0 011 060 000011 001 000 OOO 100 111 000 000 000 000 000 000 000 000 000 000 000 000000 000 000 000 000 000 000 000 000 000 000 000 000 00D A pair of X'andY addresses denotes a coordinate intersection which appears as a spot onthe 7 x 5 matrix. A set of X and Y coordinates in proper time sequencedefines a character. As shown inTable l, the X and Y addresses necessaryto define a character are predetermined, so that upon selection of acharacter and initiation of the ring circuit operation, the character isgenerated as -a succession of spots without external control. Codingnetwork 55, together with `ring circuit 56, operates to produce a seriesof three bit X, three bit Y and one bit character termination signals,the former two of which constitute the inputs of the associated X and Ydecoders listed in Table l1.

Referring now to Table 1, it is seen that the signals to Vthe X and .Ydecoders differ from the corresponding X and Ycoded address signals.These two sets of signals are required due to the spot sequentialtechnique employedlby the present apparatus, wherein the beam of the CRTis caused to move successively from spot to spot rather than return tothe zero position between spots. The digital-to-analog converters,illustrated in and more fully described hereinafter with respect to Fig.16, effectively operate as three stage fiip-ffop registers. Theflip-iiops used in the decoders 60 and 61 may be ofthe typeillustratedin Fig. 14 to be more fully described hereinafter. lf thesignal yapplied to the complement input of -a register stage risrepresentative of a `binary 1, thestate of the flip-flop is reversed; ifthe input to the same register stage is representative of a binary 0,the associated ip-flop remains in its existing state. The output of eachflip-op is one of two possible states; if the flip-flop is in the lcondition, a positive D.C. output level is obtained, if the fiip-iiop isin the 0""condition, nofoutputis obtained. The-output of each Aof thedigital-to-analogrdecoders for any stage of the ring circuit` to a newoutput varyingas the X vandiY addressesV for the following stage of thering circuit.

Thus, whenever any bit of the three bit X or Yaddress signals diiers`from thecorresponding bit in the-preceding address, `i.e.`,.whe'nev`er'a`0" is changed to "1 or a.1rto 0, a positive signal representative ofa. binary 1 is applied to the complement input of the associatediiipliop, thereby reversing the state of the flip-flop. In this manner,each X Vand Y address signal for a particular ring stage is modifiedwithin `the decoder network by the signal to the X or Y decoder for thesucceeding ring stage to produce an output signal varying as a functionof the succeeding address. The process is repeated until all the X and Yaddress signals have been produced.

The signals to the X and Yjdecoders are the output signals produced bythe coding network. `By applying the potential output of the decodersthrough mixing networks tothe beam deflection plates of a CRT, the beamof the fCRT is enabled to move directly fromspot to spotto therebysynthesize the selected character. In this manner, a` character issynthesized in accordance with a predetermined code.

While the 5-X addresses and 7 Y addresses of the coordinates shown inFig. .2` are common to all characters which maybe generated on the ,7 x5 matrix, thel thirty-tive available intersections of said X and Y adldresses on the matrix and the sequence at which the selected spotsAmaybe generated provide the variation necessary to generate `differentcharacters. A separate coding network will be necessary for eachparticular character using the above common Xgand Y addresses, sinceeach character differs from othercharacters both in the spots requiredto dene such character and in the particular sequence at which theselected spots arelgenerated. While a singlecharacter shown in Fig.Zghas been described as illustrative of the spotjsequential method ofcharacter generation, the technique .employed/to generate any characteron such a matrix is' identical.

Operation"imgeerang a plurality of characters 'While thesynthesis of asingle character has been described inY detail with reference to Fig. l,the apparatus y illustrated therein is capable of ,selectivelyAsynthesizing a plurality of characters in a predetermined sequence.

Referring again to Fig. 1, aplurality of four bit binary registers 1--8are employed to providestorage for the fourbit character selectionsignals representing the character to be synthesized. The apparatusdescribed herein is specifically designed to synthesize eightcharacters, two` lines of four characters per line, but the capacity ofthe apparatus may obviously be modified in a manner hereinafterdescribed to tit a particular application. Registers 1--8 may serve asbulier registers wherein the data may be supplied to the registers at aslow rate of speed as compared to the high speed at which, the data maybeV .utilized by the character generator herein described.

Examples of input devices for supplying data to charac- `terselection7`signal registers 1-8 are V.punched cards,

Vbased cn any other radixmight be employed. j

Character selection signal registers 1-,8 have a parallel readout whichreads into buierregister 18 under the control of the associated gatecircuits 9-16. .Gate circuits 9--16 are logical VAND circuits which areconditioned by the D.C. level inputs from the associated registers 1-8and energized by the,D.C. level applied by sequence switch 45 4throughconductors 46-53 Yinclusive. An example of a logical AND circuit whichmay be employed is describedin lcopencling application, Serial -Number414,459, tiled on March v5, 1954, by Bernard Il. Sarahau et al. l

`OR circuit 17 is connected between the character selection signalregisters ll-k and butlerV register 1 8 pand serves to isolate theindividual registers from a common load. In the apparatusillustratedherein, eight 8 input be employed are described in the aforementionedSarahan: et al. application.

Buffer registerv 18 receives input data from registers:

1 8 in the manner described above, this data represent-` ing in binarycoded form the characters to be synthesized.. lI "he number of stages inbuffer register 18 is directly related to thecharacter capacity of theapparatus herein described. For 2n characters available for synthesis, nbi-stable stages are required. For 16 character capacity, four bi-stablestages are required inthe register. Any type register having two stablestates for cach stage may be employed. For purposes of the ensuingdescripf tion, butter register 18will be assumed to be a flip-hopregister having positive and negative `11C. level outputs on each stage.

Buffer register 13 has a parallelread out which reads into the characterselection networkr19 through 4 pairs of conductors 26 through 27.Character selection net-V work 19 is a switching array having 4 pairs ofinput conductors and .16p output conductors, this network operating toselect a particular output conductor representing the character to besynthesized in response'to a specific combination of binary coded inputsignals supplied by buier register 18. Such a switching deviceiswell-known in thev art as a matrix switch decoder, a widely/employedtype of which uses crystal rectifier networks. vSuch a device isdisclosed, `for example, in Rectiiier Networks for MultipositionSwitching, by Brown and Rochester, Proceedings of the I.R.E., February1949,fpages 139-147, wherein Fig. 2 illustrates aV 16 positionswitchhaving `16 outputs and 4 pairs of inputs. Aprectangular matrixnetwork such as shown in Fig. 3 of the above noted Brown and Rochestertreatise, having 16 'output conductors and 4 pairs of input conductorsincludes 16 4-way logical AND circuits or a total of 64 diodes, soarranged that only onev output conductor representing the selectedcharacter is selected in response to a coded input signal. However,other types of networks involving a more economical arrangement ofdiodes, tubesr and space, are also disclosed in the above noted Brownand Rochester treatise. may be designed for either positive or negativeinput signals by employing .positive or negative logical ANDV circuitsrespectively. By` the convention herein em ployed, inl: uts to thecharacter selection network will be Character Yselection network outputvconductors ,2S-43.'

Such aY matrix decoderY aesnoaa 11 Y represent 16 characters availablefor synthesis. -Each of the conductors is connected to an associatedcoding circuit within coding network 55.

Sequence switch 45 controls gate circuits 9--16 through conductors t6-53respectively, to thereby prevent read in to buffer register 17 when acharacter is being synthesized. Sequence switch 45 operates in a mannerhereinafter described to apply a positive potential to one of the gatecircuits in response to the positioning voltages labeled Xa, Xb, Xc, Xd,and Ya and Yb.

Coding network 55, composed of a plurality of coding circuits for eachcharacter available for synthesis, operates with ring circuit 56 toproduce a first and second series of control pulses, heretofore referredto as signals to the X and Y decoder respectively.

It will be assumed in the ensuing description that it is desired tosynthesize two rows of four characters each. When switch 89 is closed, astart pulse is applied from pulse generator 88 to character generatorcontrol circuit 66 through conductor 94. Control circuit 66, in additionto applying a start pulse to ring control and synchronizing circuit 59on conductor 90 to start the character generator, applies potentials toconductors Xa and Ya. These potentials are applied to sequence switch45, resulting in a positive control potential being applied to ANDcircuit 9 through conductor 46 to thereby cause read in of the data inregister 1 to buffer register 18. The character generator thereuponsynthesizes the character inthe manner described with respect to thesynthesis of a single character.

The Ya potential is also applied to mixing circuit 63 to thereby controlthe vertical positioning of the character on the screen of a CRT. It isto be noted that conductors Xa and Yb are not connected to mixingcircuits, for reasons which will be described in greater detailhereinafter. Xa serves as the reference level for the potentials Xb, Xcand Xd, while the two output levels of conductor Ya provide the verticalpositioning potentials Y,1 and Yb. Characters to be displayed as thefirst line on the CRT are positioned by potential level on pairs ofconductors Xa-Ya, XIV-Ya, Xc-Ya and Xd-Y, while positioning of thesecond line of characters will be controlled by potentials on conductorsXa-Yb, Xb-Yb, Xc--YkJ and Xd-Yb. The positioning of each character,

therefore, is determined by a pair of potentials under control ofcharacter generator control circuit 66. Upon completion of the synthesisof the rst character, a control signal is applied from the 20th stage ofthe ring through conductor 9@ to character generator control circuit 66.This control signal causes positioning potentials to be applied bycharacter generator control circuit 66 to conductor Xb and Y,1 in amanner hereinafter described. These signals cause sequence switch 45 toemit a switching level signal on conductor 47 to thereby cause the datastored in register 2 to be read into butter register 13 in a mannerdescribed heretofore.

Conductor 93, connected between ring circuit 56 and ring control andsynchronizing circuit 57, causes the ring to be recycled to therebysynthesize the succeeding character. Upon completion of each character,another combination of conductors is selected by character generatorcontrol circuit 66, and the positive potentials applied thereto resultin the coded data representing the succeeding character being enteredinto butter register iii. Upon completion or' the fourth character online l, the output signal level Ya is modified to provide verticalpositioning for the second line of characters, and the ring is againrecycled four times to produce the second lineof four characters in themanner described above. Upon synthesis of the last character, thecontrol pulse from the 20th stage of the ring causes the charactergenerator control circuit to emit a stop character generator pulse onconducto-r 92. -This stops the process of character synthesis until-theprocess is -again initiated by a start pulse applied by charactergenerator control circuit 66.

The coding network shown as block in Fig. 1 may take many forms,examples of which are shown in Figs. 4 through 7.

Fig. 4, for ease of illustration, shows only two of the 16 codingcircuits within the coding network 55 and further shows one of thosecoding circuits in detail. The coding circuit of Fig. 4 may be termed adiode coding circuit, that is, diodes are connected between the ringoutput conductors and the coding network output con ductors inaccordance with a predetermined code for the particular characterrepresented by the coding circuit. The coding circuit shown in detail inFig. 4 shows the diode connections used to generate the coded signalsfor the character 2.

T he apparatus illustrated in Fig. 4 operates in the following manner toproduce these coded signals to the X and Y decoder. Output line 28representing the character 2 is selected by character selection network19 in a manner described with reference to Fig. 1, and a positive D.C.potential is applied thereto. This D.C. potential operates to conditiongate circuits through 141. The gate circuits used throughout theapparatus herein described are of the type conditioned by a D.C. signaland made conducting upon receipt of a' short duration pulse. As the ringcircuit 56 of Fig. l steps along, a positive signal is emitted on ringoutput lines 101- 120 successively. As the signal is applied to eachring output conductor, it appears on coding network output conductors ifthe ring output conductor is connected to the coding network outputconductors through an associated diode. For example, the output pulseapplied to ring output conductor 1431 will produce a binary l at codingnetwork output conductors Y0 and Y2, since conductor 16111 isinterconnected to conductors Y0 and Y2 through diodes 142 and 144 andgate circuits 138 and respectively. The remaining conductors X0, X1, X2,and Y1 since they are not connected to ring output conductor 101 througha diode, will not receive an output signal. Thus the signals to the Xand Y decoder for the first ring output line are 000 and 101respectively, which correspond to the values listed for ring stage l inTable l. Similarly, the signal emitted on ring output conductor 192 isapplied to the X2, Y1 and Y2 signal lines through diodes 145, 146 andM7, to produce output signals to the X and Y decoder of 001 and O11,respectively, which correspond to the signals to the X and Y decorderlisted for ring stage 2 in Table l. A signal on ring output conductor115 which corresponds to ring stage 15 in Table l, is applied to the endof character signal output conductor through diode 148,' and gatecircuit 141 to control the intensity of the CRT beam in the mannerdescribed heretofore.

While the coding circuit for a single character has been described indetail, a separate coding circuit is required for each differentcharacter to be generated. The coding circuits for the remainingcharacters would include 7 signal lines per character, each line havingan associated gate circuit, together with an array of diodesl wiredaccording to the code for the particular character. RingV output lines101-120 inclusive would be common for all circuits. Seven signal lines,each line having an associated gate circuit, are unique for eachcharacier coding circuit, but only the signals generated for theselected character appear at the input to the X and Y decoders, sinceonly the gate circuits associated with the selected character will beconditioned in the manner pointed out above. Where a plurality of diodecoding circuits are employed for separate characters, a logical ORcircuit 156 is employed to combine the coding circuit outputs.

Referring now to Fig. 5a, there is illustrated therein a spot-sequentialcharacter generator including a coding l network of magnetic cores ofthe type having relatively in the coding Vnetwork are arrayed inhorizontalrow's and vertical columns, each characterY requiring aseparate-row of 20 cores. For n chifiracters,` the` network containsXZOcores, and at any time 20.(11-1) cores are biased into magneticsaturation. Each outputconductor ofthe character selection network,19o/f flig.` lgis connected to an associated 'rowvof cores through bias,drivers shown in block form as IS7-.160, and,v illustratedlin`scheinatit; form in Fig. c. Anegatve petential is applied to all oftheconductors 28-431exeept the selected one, .to which a positivepotential` is applied. VThe; bias `driver etiee-` tively operates as aswitch. A negativeinput toan as-l sociated bias driver is inverted toproduce a current output, while a positive input tothe ibias driverproducesa zero output, the current` or zeroA ,outputs beiiig'fapplied onconductors shown as 176-4179. .Thef voperationI of the bias driver` ismore fully describedwith reference to Fig. 5c. Each ring outputconductor 10.1.#-1'201 hasan associated pulse amplien illustrated as161-164finelusive, which is employed torraise thepulsefamplitude to apredetermined level` whiehewill be more ,fulvly'defv scribedhereinafter. The cores,` as noted, arel arranged in column form`,f`each`vertical column consistingf cores Vfrom the horizontal rows associatedwitheach"char:

p ut conductors areA threaded through or around all of -the cores in thenetwork.

`Referring`now to Fig. 5b, there is shown a `curve 150 illustrating a`preferred hysteresis characteristic for the material of the magneticcore employed in the coding network of Fig. 5a. VAn eilample of suchmaterial is known in the art as Ferramic H. The coercive force, shown asHc, Ashould be as small Vas possible, whilethe remanen'ceor.ret'ehtivity B1P or the material should be very low as `ccnrripared tothe saturation flux density Bs. It is desirable to` have the transitionfrom the unsaturated acter coding circuit. Ring ,outputlines i- 1120.are, t

as shown, common ,to all coresin their associated column. Each row ofcores in turn `has, seven associated, signal conductors threaded throughor `'around 'eachI Vcorefin the row in a manner hereinafter` described,@conductor threaded through the coreirepresenting a binary 71,a

conductor threaded around the core representing a binary y 0. `As thering moves `along inl sequential fashion, a signal is emitted to eachcolumn kfrom its associated ring output conductor and pulse amplifier.The cores `are so wound that the driving current emtted'from pulse am#pliers 161-164 produces mmf. of the samepolarityuas that produced by`the bias drivers "on the rowsofenon.- selected cores, which merelydrives the non-fselected cores further into magnetic saturation. Thisproduces relatively no change of flux, because the bias current appliedis suflicient to cause these coresto be driven far into'frnagneticsaturationj f M. l However, with respectto `the row of coresirepreserltfing the selected charactenno rbiaslis'eitercised on the cores and mmf.supplied bycurrent pulses` fromthe pulse .ampliers 1,61-164 willproducearelativelyglarge change of flux in the cores, `thecurrentemitted from pulse ame pliers161-164 is such that magnetization ofthecore occurs within `the hysteresisloop,ofA the core` material. Forpurposes Vof theensuing discussiomthe rowfof cores shown in Fig. 5a as165-168 will be assumed to, comprise the coding network for .thecharacter 2. t, One'v of two effects is produced with `respecLto,thegsevenasf sociated signalv conductors. i, lf `the conductor isthreaded throughthe core, `the currentipulse lproduces achange in fluxwhich induces a potential` in thegconductorin the form of a voltage-pulse representing a binaryifl, if the conductor passes outside'thecoreg'n'o voltage is induced, representing arbinary 0. The wiringpattern for the seven signal conductors associated with each characterissuch-that the signals produced on the seven conductors linking thecores in Ithe'codingcircuits, are those `signalspreviously referred toas signals to the X and Y decoders `respectively', and character'termination signals for controlling the intensity of 4thefCRlh beam".

It is to be nted in Fig. 5a that the sevenfoutputcon# ductors of 'thecoding network are shownas being threaded through certaincoresof thevarious rows and columns, and around certain othersof theeores.' Fig. 5ais not intendedfto indicate the `actual wirin'gofthe output conductorsbutl is merely 'intended to illustrate the general arrangement ofV thosewires@ It shouldbe particularly noted in Fig. 5a that`thefsamefsevenioutf state to thepsaturated state of the core materialoccur as," sharply as possible. L A magnetizing force, delta H, of shorttime-duration, applied to azjcore with the magnetization characteristicshown in` Fig.`5b will produce a large change vofiux, delta B1', in theselectedcoresand a very small change of uxQdelta B2, in the non-selectedcores due Vtofthe large biasmagnetomotive force HB exerted onth'e non-zselected"'eores`.j Sineethe voltage inducedin thesignal windings on`sucltafcore is proportional tothe change of iluxV produced,`significant Voutput voltages are obtained only from` the selected cores.j i 4eferring now to Fig. 5c, there is illustrated in schem'aticformabias driver, of the type illustrated in block form as IS7-161i in Fig.5a. 'The circuit contains a dual-triode tube 170, which may be, forexample, a vacuum tube type 5998.` In Vorder for this circuit to supplyYwhen* theifirst section is non-conducting. When the secohdseetion oftube 170 conducts, the current on output conductor 176 is of sufficientamplitude to bias the cores, controlledV by that `bias driver, far .intomagnetic'lsatu'raktion. e Withrespect to the output conductor of thecharacter selectionhetwork 19of Fig. 1 representing the selectedcharacter, the positive'potential applied to conn trol grid`171of thefirst'seetion of dual-triode `170 causes that `section to conduct.V Whenthe iirst section is con- ',ducting,V it draws suicient current todevelop a voltage across cathode resistor 174, thereby raising thecathode potential which effectively reduces the grid bias of thesecond's'ection of dual triode 170 to such la level that it cuts off.Thus the row of cores associated with the selected character has zerobias, while the rows associated "with"nonselected characters havesufficient bias to vcause themto be saturated.Y

' IReferrmgnow to Fig. 6a, magnetic cores 'of the'type having ahighratioof residual magnetization to magnetic saturation are employed'in the coding network. `The positive potential applied to the selectedoutput line'of the character selection network 19 serves to condition anl associated gate' circuit, illustrated as 1817-185 inclusive. Prior toinitiating operation of the'ring circuit `56 in Figl, a positive pulseisapplied to a common grid input to the'column of gate tubes 181-185 bymeans of conductor 186. Conductor 186 is energized by the ring controland synchronizing circuit S7 in Figi as will be more fully describedhereinafter. The selectedY gate cir` euitapplies a positiye pulse to itsassociated row of cores to magnetize allI ofthe cores in the row to thel remaf; hence state. The remainingrrows of cores in thenet-Y work areset in the 0 remanence state by any `suitable means not shown. The l andG states of remanence offmagnetic cores is more fully explainedhereinafter. y

v TheV signals onfring output-conductors 1014- are amplifedftliroughpulse amplifiersV 187-190. The row of selected cores are, as noted,inthe 1 remanenceY state.` the remaining cores 1n the opposite or Offrema-

